An improved 15-level asymmetrical multilevel inverter with reduced switch count

Document Type

Article

Publication Date

1-1-2021

Abstract

This paper discusses a new and modified circuit topology of a 15-level multilevel inverter having the advantage of lower switch count. The presented topology is having asymmetrical configuration. The superiority of the proposed topology is proved by the fact that it requires lower switches for generating same output levels and at the same time, it is also having lower value of reverse blocking voltage of switches. The detailed comparison with other topologies is explained and shown in tabulated form. The simulation results for different R and RL loading conditions and also for different modulation index are shown in paper. MATLAB/SIMULINK is used for the simulation. Hardware results are also discussed in the paper to validate the simulation results. These results are taken with an experimental prototype. A brief summary is also presented in the last section of the presented work. © 2021, The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd.

Keywords

Multilevel inverter, Nearest level control, Total standing voltage

Divisions

sch_ecs

Funders

None

Publication Title

Lecture Notes in Electrical Engineering

Volume

723 LN

Publisher

Springer Science

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