Experimental validation of nine-level switched-capacitor inverter topology with high voltage gain
Document Type
Article
Publication Date
8-1-2021
Abstract
This paper proposes a new switched-capacitor nine-level (9L) inverter with reduced switch count. In the proposed topology, floating capacitor (FC) is employed as a voltage booster, and it does not need any additional sensors to maintain the voltage across the FC. Due to additional FC, the number of dc sources and voltage stress on switches is reduced. Moreover, the proposed topology can be cascaded to achieve more voltage levels. Various parameters are considered in the comparison of the proposed topology with other recent switched-capacitor topologies. Simulation and experimental results demonstrate the performance with different load and modulation index variations.
Keywords
Boost inverter topology, Multilevel inverter, Nine levels, Reduced switch count, Switched-capacitor unit
Divisions
sch_ecs
Funders
Ministry of Higher Education, Malaysia under the Long Term Research Grant Scheme (LRGS) (LRGS/1/2019/UKM/01/6/3)
Publication Title
International Journal of Circuit Theory and Applications
Volume
49
Issue
8
Publisher
John Wiley & Sons
Publisher Location
111 RIVER ST, HOBOKEN 07030-5774, NJ USA