A low power high precision trim-less envelope detector for fail-safe circuit in LVDS receiver

Document Type

Article

Publication Date

10-1-2020

Abstract

This brief presents a trim-less precision envelope detector for fail-safe circuit in LVDS receiver. A preamp is proposed using gm-constant biasing concept to produce an accurate gain of 9.78 dB across PVT covering the full range of the LVDS input common-mode voltage. The preamp produces a fixed output common-mode voltage of 200 mV across supply voltage variation which reduces its complexity by alleviating the need of a trimming circuit. A unique reference voltage generation of the envelope detector based on level shifted output common-mode voltage accurately compares the output common-mode and negative peak voltages to set the detection threshold. An LVDS receiver adopting the proposed envelope detector was fabricated on a standard 0.13-mu m CMOS. With a supply voltage of 3.3 V, the envelope detector achieves a voltage trimming precision of 20 mV while only consuming 162 mu W of power.

Keywords

Envelop detector, Preamp, Peak detector, Low-voltage differential signaling (LVDS)

Divisions

fac_eng,sch_ecs

Publication Title

IEEE Transactions on Circuits and Systems II: Express Briefs

Volume

67

Issue

10

Publisher

Institute of Electrical and Electronics Engineers

Publisher Location

445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA

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