Plasma Platform to Investigate Error Structure in the Electronic Components
Document Type
Article
Publication Date
1-1-2019
Abstract
This program was designed to introduce a plasma platform to examine the field programmable gate array (FPGA) of the link boards typically used at the CERN's arge Hadron Collider (LHC). Pulsed plasma systems with accelerating gradient of 1 kV mu text{m} generate high-intensity, high-energy radiation beams. Single-event upset (SEU) is caused by radiation deposition in the FPGA. In FPGA, the SEU probability for 1-MeV protons and 10-keV X-rays are 0.1 and 2 × 10{-9} particle {-1}. The number of SEU induced in the Si by 1-MeV proton irradiation at 0.8-V bias computed from simulation in COMSOL Multiphysics was 1.8 × 10{5}. Although more experimental research is needed to identify the underlying mechanisms, pulsed plasma is perceived as being a smart alternative to investigate the error structure in FPGA. © 1973-2012 IEEE.
Keywords
Bit error rate, error analysis, industrial electronics
Divisions
PHYSICS
Publication Title
IEEE Transactions on Plasma Science
Volume
47
Issue
5
Publisher
Institute of Electrical and Electronics Engineers (IEEE)