Design of Low Power Low Noise Amplifier using Gm-boosted Technique
Document Type
Article
Publication Date
1-1-2018
Abstract
This paper presents the development of low noise amplifier integrated circuit using 130nm RFCMOS technology. The low noise amplifier function is to amplify extremely low noise amplifier without adding noise and preserving required signal to a noise ratio. A detailed methodology and analysis that leads to a low power LNA are being discussed throughout this paper. Inductively degenerated and Gm-boosted topology are used to design the circuit. Design specifications are focused for 802.11b/g/n IEEE Wireless LAN Standards with center frequency of 2.4 GHz. The best low noise amplifier provides a power gain (S21) of 19.841 dB with noise figure (NF) of 1.497 dB using the gm-boosted topology while the best low power amplifier drawing 4.19mW power from a 1.2V voltage supply using the inductively degenerated.
Keywords
CMOS, Integrated circuits, LNA, Noise figure
Divisions
fac_eng
Publication Title
Indonesian Journal of Electrical Engineering and Computer Science
Volume
9
Issue
3
Publisher
Institute of Advanced Engineering and Science