An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances
Document Type
Article
Publication Date
1-1-2018
Abstract
This paper details the theory and implementation of an inverse-class-F (class-F -1 ) CMOS oscillator. It features: 1) a single-ended PMOS-NMOS-complementary architecture to generate the differential outputs and 2) a transformer-based two-port resonator to boost the drain-to-gate voltage gain (A V ) while creating two intrinsic-high-Q impedance peaks at the fundamental (f LO ) and double (2f LO ) oscillation frequencies. The enlarged second harmonic voltage extends the flat span in which the impulse sensitivity function (ISF) is minimum, and the amplified gate voltage swing reduces the current commutation time, thereby lowering the - g m transistor's noise-to-phase noise (PN) conversion. Prototyped in 65-nm CMOS, the class- F -1 oscillator at 4 GHz exhibits a PN of -144.8 dBc/Hz at a 10-MHz offset, while offering a tuning range of 3.5-4.5 GHz. The corresponding figure of merit (FoM) is 196.1 dBc/Hz, and the die area is 0.14 mm 2 .
Keywords
Figure of merit (FoM), flicker noise upconversion, inverse-class-F (class-F -1 ) oscillator, phase noise (PN), second harmonic resonance, voltage-biased oscillator
Divisions
fac_eng
Funders
Macao Science and Technology Development Fund through SKL Fund,University of Macau under Grant MYRG2017-00185-AMSV,Motorola Foundation under Grant IF046-2017
Publication Title
IEEE Journal of Solid-State Circuits
Volume
53
Issue
12
Publisher
Institute of Electrical and Electronics Engineers