A simple THD minimization technique for transistor-clamped H-bridge-based cascaded multilevel inverter
Document Type
Article
Publication Date
1-1-2018
Abstract
This paper presents a simple modulation technique that minimizes the output voltage total harmonic distortion (THD) without eliminating the lowest order harmonics. It uses the voltage-angle equal concept of sinusoidal reference waveform to generate the step output voltage of a single-phase transistor-clamped H-bridge (TCHB)-based cascaded multilevel inverter. The real implementation of the modulation technique for a various range of modulation indices is built using an Altera field-programmable gate array (FPGA). It is found that the proposed modulation method resulted in a dramatic decrease in the inverter’s output voltage THD when increasing the number of output steps up to thirteen levels.
Keywords
Multilevel inverter, THD minimization, Total Harmonic Distortion (THD)
Divisions
umpedac
Funders
Universiti Teknikal Malaysia Melaka (UTeM), University of Malaya (UM),Ministry of Higher Education for supporting this research under FRGS (FRGS/1/2015/TK04/FKE/03/F00256)
Publication Title
Journal of Telecommunication, Electronic and Computer Engineering
Volume
10
Issue
1-3
Publisher
Universiti Teknikal Malaysia Melaka