Document Type
Conference Item
Publication Date
1-1-2009
Abstract
This paper presents the dependency of analog and short channel effects (SCEs) performance of 75 nm channel length fully-depleted Silicon On Insulator (SOI) device on the applied Graded Channel (GC) design. The comparative analysis between standard SOI (STD SOI) devices at doped channel and equivalent threshold voltage, Vth with GC SOI device are examined on the basis of internal physical mechanisms. Device characterizations are performed using simulation based approached provided by ATLAS 2D. Results show superiority of GC performances over standards SOI devices in both analog and SCEs point of views.
Keywords
Graded Channel Fully Depleted SOI, SOI, analog, Short Channel Effects (SCEs)
Divisions
fac_eng
Event Title
Advances in Microelectronics, Nanoelectronics and Optoelectronics
Event Location
Istanbul, Turkey
Event Dates
30 May-1 June 2009
Event Type
conference